Extending Formal Verification to Sequential Circuits (U. of Bremen)
Technical Paper Link
Researchers from University of Bremen have released “Linear Formal Verification of Sequential Circuits using Weighted-AIGs”. Abstract “Ensuring the functional correctness of a digital system is achievable through formal verification. Despite the increased complexity of modern systems, formal verification still needs to be done in a reasonable time. Hence, Polynomial Formal Verification (PFV) techniques are being... » read more The post Extending Formal Verification to Sequential Circuits (U. of