semiconductor-industry

3D-stacked near-memory LLM decoding; In-SoIC ESD protection for chiplets; thermal management for adv. packaging; quantum circuits on chiplets; agentic AI for formal verification; multilayer nanostructure characterization; liquid cooling for adv. packages; NV photonic coupler arrays. The post Chip Industry Technical Paper Roundup: May 5 appeared first on Semiconductor Engineering .

GlobalFoundries today announced the introduction of its SCALE optical module solution for co-packaged optics (CPO). GF’s SCALE solution, or Silicon photonics Co-packaged Advanced Light Engine solution, is the industry’s first Optical Compute Interconnect Multi-Source Agreement (OCI MSA) capable platform. The post GlobalFoundries Accelerates Adoption of Co-Packaged Optics for Advanced AI Data Cent…

Metalenz’s Polar ID face-scanning technology works even when the camera is hidden under the display.

ASML's Best Selling Product complex engineering meets human connection $400m Machine vs. $200 Toy There is a machine in the Netherlands that is essentially the heartbeat of the modern world. It’s called an Extreme Ultraviolet (EUV) lithography tool, and it’s built by ASML. Without these machines, we don’t have the high-end chips that power your iPhone, your AI models, or your data centers. Each u…

Long‑running agents, tool-calling LLMs, and multimodal chaos are rewriting edge compute rules, and making chip design more challenging. The post Designing Chips In The Context Of Rapidly Evolving AI appeared first on Semiconductor Engineering .

This $2,000 Asus laptop delivers breathtaking performance thanks to Qualcomm's Snapdragon X2 Elite Extreme, but at the cost of nearly everything else.

New cooperation supports makers, educators, and commercial teams requiring fast, low-quantity FPGA access. The post GOWIN Semiconductor Collaborates with JLCPCB appeared first on Semiconductor Digest .

Amtech Systems, Inc., a manufacturer of equipment and consumables enabling AI semiconductor device packaging and advanced substrate fabrication, today announced the appointment of Mr. Thomas Sabol as the Company’s Chief Financial Officer, effective May 14, 2026. The post Amtech Systems Appoints Thomas Sabol as Chief Financial Officer appeared first on Semiconductor Digest .

Quiptech Mexico will serve as an authorized distributor for Nordson Test & Inspection products in Mexico, providing local sales, technical support, and responsive service. The post Nordson Test & Inspection Announces Partnership with Quiptech Mexico appeared first on Semiconductor Digest .

Google's TPUs now for sale; 2/3nm capacity crunch; IC tool sales to China stopped; memory shortage widens in 2027; mega-earnings; Arm's agentic toolkit; Intel seeds universities; KAIST's liquid cooling for advanced packages; MIT-IBM tool for estimating power; V2X collaboration. The post Chip Industry Week in Review appeared first on Semiconductor Engineering .

The AI boom is worsening a global memory chip shortage, which Samsung predicts will continue into 2027 Samsung Electronics on Thursday reported record quarterly profit driven by a 49-fold jump in chip income, saying it expects a severe supply shortage to deepen next year as clients spend on AI, driving up prices of its memory chips. A boom in the construction of AI datacentres has spurred Samsung…

Everspin expands on-shore Toggle MRAM technology capabilities, adding support for U.S. government initiatives. The post Everspin Executes $40M Agreement for Mil-Aero MRAM Applications appeared first on Semiconductor Digest .

SEMI, the industry association serving the global semiconductor and electronics design and manufacturing supply chain, today announced the appointment of Julie Rogers as Executive Director of the Electronic System Design Alliance (ESDA), a SEMI Technology Community. The post SEMI Appoints Julie Rogers Executive Director of the ESD Alliance appeared first on Semiconductor Digest .

Turning billions of violations into actionable insights. The post Transforming DRC Closure At Advanced Nodes appeared first on Semiconductor Engineering .

Current approaches involve multiple tools, vendors, designs, data formats, and abstractions. Can agents really use them all? The post Creating Agentic EDA Methodologies appeared first on Semiconductor Engineering .

The inability to access leading-edge process nodes has created opportunities for small and midsize chip developers in multi-die design, but it requires some sophisticated architectural design tradeoffs. The post Foundry Capacity Is Limiting Who Competes At Leading Edge Nodes appeared first on Semiconductor Engineering .

Analyze the effects on eye diagrams, BER, and timing margins by integrating advanced equalization algorithms into channel simulations. The post Unlocking High-Speed Serial Link Signal Integrity With AMI Model appeared first on Semiconductor Engineering .

The boundaries between IP reuse, interconnect design, and hardware-software integration are no longer independent. The post Facilitating Complex SoC Design Through Automation And Integration appeared first on Semiconductor Engineering .

Identifying and addressing design gaps in advanced packages. The post How To Streamline Your Advanced Package Interconnect Designs appeared first on Semiconductor Engineering .