Who controls compute supply chains? Looking into Japan as an underexplored case

Published on June 1, 2026 1:11 PM GMT This post is part of a comparative project on East Asia compute governance, initiated as part of the inaugural round of AI Gov Sprints . Many thanks to David Sanchez Garcia , who led this project and whose feedback greatly benefited this piece, and to all who gave feedback on earlier drafts. This post was lightly edited for flow using Claude; all ideas and arguments are my own. All mistakes, too, are my own. A lot of compute governance discourse focuses on the US-China dynamic, alongside Taiwan sometimes emerging too. Japan, meanwhile, tends to show up merely as a supporting character. I think this framing undersells its actual position. Japan sits at several critical chokepoints in the global compute supply chain , is currently making large public bets on semiconductor revival, and is navigating a difficult tension between US-aligned export controls and unavoidable commercial dependence on China. This could make it a revealing case for “middle powers” navigating compute and its governance, which is reason enough to look. Hence, this post is an attempt to map Japan's position in global compute supply chains (alongside its strengths, bets, and vulnerabilities) as a starting point. Epistemic status I am a complete non-expert writing this out of curiosity. I have no prior background in semiconductors, supply chain policy, or Japanese industrial history. Whilst I’m currently more certain about the broad narrative arc for Japan and its relevance, I’m less confident about some precise figures (which occasionally varied across sources). I’ve tried to be accurate by gleaning and linking adequate sources throughout, but I always welcome corrections. Some background: Japan’s decline, and the road to (partial) recovery Once home to six of the world's ten largest semiconductor firms, Japan has watched its global market share collapse in three decades. In the 1980s, Japan was the undisputed semiconductor superpower. Six of the top ten semiconductor companies in the world in 1989 were Japanese, and Japan commanded over 50% of global chip sales. By 2023, that share had collapsed to below 10%. Image source The proximate causes for this decline were mostly external. The Plaza Accord's yen appreciation devastated the price competitiveness of Japanese exports, and a series of US-imposed trade barriers compounded the damage, especially the 1986 Semiconductor Agreement , which restricted Japan's access to American markets. In 1987, the US imposed 100% tariffs on Japanese memory chips , delivering a blow from which several firms never recovered. Yet some structural causes also were internal. Japanese firms clung too long to the “Integrated Device Manufacturer” model, maintaining fully in-house operations from design to fabrication at a moment when American and Taiwanese firms were pivoting toward the specialised fabless-and-foundry model that now dominates the global industry. The consequences, ultimately, were pretty much catastrophic. Once-legendary semiconductor divisions were forced into bankruptcy or consolidation, exemplified by the merger of the DRAM departments of Hitachi and NEC into Elpida Memory, which itself later failed. Japan's story thus stands as a cautionary tale about the cost of institutional rigidity for middle powers making the transition to a digitalised society. It is precisely this history that frames today's revitalisation. Where Japan still dominates the supply chain Today, Japan still controls several critical segments of the compute supply chain. In materials, Japan's position is extraordinary, as mapped in this CSIS piece . The Japanese firms Shin-Etsu and Sumco are the world's largest silicon wafer manufacturers, holding 29.4% and 21.9% global market shares respectively . Japan also holds the world's second-largest semiconductor manufacturing equipment (SME) industry, capturing 29% of global sales. This makes Japan second to only the United States for SME production, and places the nation far above other East Asian nations: China, Taiwan, and South Korea make up merely 2%, 0.4%, and 4.8% of the global market share respectively. The concentration of Japanese dominance in specific niches is even more pronounced: Japan controls a large proportion of the market for coaters and developers (the tools that apply and develop photoresist layers on wafers). Tokyo Electron has a near dominant share for EUV developers , which is equipment used in the most advanced chipmaking processes in existence. Japan's public investment in semiconductors is unusually large The scale of Japan's financial commitment to compute infrastructure is, by any measure, extraordinary. Japanese fiscal support amounts to approximately 0.71% of GDP (roughly $27 billion) representing fiscal spending that proportionately exceeds that of the United States (0.21$26bn); over ¥50 trillion ($330bn) in combined public and private investment is the projected total. Silicon Island rises The most immediately tangible expression of Japan's semiconductor revitalisation is the establishment of TSMC's Kumamoto facility under the Japan Advanced Semiconductor Manufacturing (JASM) joint venture, a project that brings together TSMC with major Japanese firms including Sony, DENSO, and Toyota, with TSMC holding an 86.5$23 billion factory. Government subsidies cover two-fifths of capital costs . Together, these facilities are expected to achieve a total production capacity of more than 100,000 12-inch wafers per month, using process technologies ranging from 40nm to 6/7nm. The economic ripple effects are projected to be substantial : a US$51 billion contribution over ten years, and the creation of over 10,700 regional jobs, with the Kumamoto site directly creating more than 3,400 professional positions. This "Silicon Island" ecosystem in Kyushu has already attracted over 100 chip-related investments since 2021, and more than 200 semiconductor-related companies now operate in Kumamoto. Over 60 firms have established an emerging semiconductor cluster in Kyushu , with TSMC leveraging Japan's deep industrial ecosystem of specialised materials and equipment suppliers like Tokyo Electron. The speed of construction is itself a signal. Local workers allegedly built the fab in just 20 months , compared to a standard three years. [1] Japan's institutional capacity to mobilise around an industrial project is a competitive asset. Rapidus and the 2nm ambition If JASM represents the lower-risk track of Japan's dual-track strategy, Rapidus represents the high-stakes gamble: an attempt to re-enter the global race for advanced logic integrated circuits (which Japan previously abandoned at the 22/20nm level) by leapfrogging directly to 2nm. Rapidus is a private corporation founded in August 2022, led by industry veterans from Tokyo Electron and Western Digital. Eight major Japanese firms, including Toyota and SoftBank, provide funding. The Japanese government, meanwhile, holds a 40$4 billion in fresh funding has been approved by METI (Ministry of Economy, Trade and Industry), bringing total cumulative government R&D support to ¥2.35 trillion. The total project cost estimated to require around ¥5 trillion ($35 billion) before mass production can begin. The workforce is growing rapidly : 20 to 30 new employees join every month. Rapidus is targeting 2nm mass production by 2027, at a planned 25,000 wafer starts per month . The government views the transition to 2nm architecture as a "blank-slate challenge.” Because the technology differs fundamentally from other generations, it provides a window for Japan to break into the market without having to overcome incumbents with established manufacturing runs at the same node. The geographic home for this ambition is Hokkaido, which Japan is attempting to transform into "Hokkaido Valley," a global hub for advanced semiconductors. Rapidus CEO Atsuyoshi Koike claims the company's competitive edge will be delivering finished chips three to four times faster than any global rival. Instead of positioning itself as a direct competitor to TSMC in volume, Rapidus pitches itself as a nimble, precision-focused foundry targeting a niche for small-batch, high-speed, customised manufacturing tailored for AI startups, quantum computing, and specialised industrial applications. However, one analysis identifies "customer acquisition" as the biggest commercial risk : building a factory is easier than securing enough orders to justify immense operating costs. The measure of success will be whether Rapidus can remain competitive without perpetual state aid. A more fundamental critique questions whether creating Rapidus from scratch is a reasonable path toward supply chain resilience compared to simply expanding existing TSMC partnerships. The unorthodox single-wafer production model Rapidus is pursuing could fulfil demand for speed that mass-scale foundries like TSMC cannot meet, but it also reflects a manufacturing philosophy that has never been validated at commercial scale. The North-South chip axis The geographic logic of Japan's semiconductor revival is crystallising around two poles. Kyushu has already attracted over 100 chip-related investments since 2021, anchored by the JASM complex in Kumamoto but extending across the island's existing industrial infrastructure Hokkaido, by contrast, is a deliberate construction: a localised green and digital ecosystem built around Rapidus, supported by the Digital Garden City Initiative's subsidies for site preparation and renewable energy tie-ins Kyushu builds on existing strengths and proven partnerships. Hokkaido bets on an unproven company and an unprecedented technological leap. Together they reflect the dual character of Japan's entire semiconductor strategy: one foot in pragmatism, the other in transformative ambition. Chips as civilisation Japan frames its semiconductor and AI ambitions in unusually expansive terms. The journey began with the 2016 " Society 5.0 " vision, which positioned AI as a tool for human-centric social resolution. Where other powers frame compute dominance in terms of supremacy or security, Japan's framing is much more integrative and even congenial: technology in service of society, not the other way around. Compute governance, in Japan's framing, is ultimately a vehicle for the allocation of resources toward beneficial applications, and for realising Society 5.0. Now, whether this framing meaningfully shapes policy outcomes (or perhaps functions merely as a legitimising narrative for industrial strategy that would exist regardless) is harder to assess. Certain budget allocations (discussed below) suggest an accelerator instinct runs deeper than the civilisational framing implies. Accelerator nation For Japan’s AI governance scene, a major legal milestone came in 2018 with an amendment to the Copyright Act (Article 30-4), which famously permitted data scraping for AI training without rights-holder permission, a move that established Japan as a "machine-learning paradise" and gave domestic AI developers a significant advantage in training data access. The rapid rise of generative AI in 2023 forced a reckoning with this deliberately light architecture. Japan's G7 presidency that year produced the Hiroshima AI Process (HAIP), initiated in May 2023, the first international framework for generative AI governance, which was rapidly realised just seven months after the launch of the process. The Japan AI Safety Institute (AISI) was launched in February 2024 . Unlike the UK's AISI, which functions as a "startup within government," or the EU AI Office's regulatory enforcement role, Japan AISI acts primarily as a hub for information gathering. It has no regulatory power. This seems to contradict what Akiko Murakami, the Director of Japan AISI, has stated : "You can't step on the accelerator without a brake." Moreover, a supplemental budget allocated$2.1 billion for AI overall , of which only roughly $7 million was specifically for risk response. This ratio reveals the real balance of priorities. Where Japan’s compute goes The semiconductor strategy and the AI governance framework converge in Japan's AI compute ecosystem, the physical and institutional infrastructure through which compute will actually be deployed for productive use. Japan's AI compute infrastructure is anchored by Fugaku . Fugaku was the world's fastest supercomputer from June 2020 to June 2022, and has demonstrated significant AI workload performance. This performance has been leveraged for high-impact research, including COVID-19 mask simulations. Concurrently, Japan is experiencing a massive surge in data centre investment driven primarily by AI workloads, which now require rack densities of 40–80 kW , pushing operators toward liquid cooling solutions. NTT Global Data Centres remains a dominant operator with 1 GW of operational capacity and major expansions , including a 100 MW site in Tochigi, whilst KDDI is developing a 400 MW AI facility in Sakai City, Osaka. A massive 3.1 GW data centre hub is planned for Nanto City. Such "Tier 3 facilities" are growing fastest. Triple-region architectures are becoming standard to work around Tokyo's power constraints, using satellites in Hokkaido or Kyushu to bypass grid congestion. Japan has established a robust sovereign AI ecosystem, driven by over 30 major domestic LLM variants developed to ensure data sovereignty and security. The leading example is NTT's tsuzumi 2 , designed to run on a single GPU whilst matching the performance of much larger external models in specific business domains. Tsuzumi 2 is a purely domestic model built from scratch, offering high security and low cost, and delivering "world-top results" among models of comparable size for Japanese, especially in business and safety domains. Export controls Like the rest of the world, Japan has come to view chip exports as a national security concern and its export control policy as a geopolitically-informed endeavour. In March 2023, Japan’s METI announced the addition of 23 types of high-performance SME to its export control list. These regulations officially took effect in July 2023, targeting sophisticated tools used in cleaning, deposition, lithography, and etching processes. Even though Japanese officials maintain that these measures apply to all regions and are not targeted at a specific country, it seems to me that they functionally limit the export of advanced equipment to China. Enforcement operates through a tiered licensing framework under the Foreign Exchange and Foreign Trade Act. Exports to 42 "preferred" countries (including the United States, Taiwan, and South Korea) are eligible for a simplified General Bulk License. Exports to approximately 160 other destinations, including China, require either an individual license or a more restrictive Special/Specific Bulk License. However, Japan's export control architecture has notable gaps that distinguish it from the American approach. Japan does not currently restrict the re-export of controlled items once they leave the country; [3] instead, METI relies on case-by-case goodwill agreements where exporters voluntarily inform the ministry of re-exports, but Japan actually lacks the legal authority to sanction non-compliance with these agreements. These asymmetries mean that Japan's export controls, whilst real and consequential, are far less comprehensive in their reach than American controls. A chip cartel? The Chip 4 Alliance comprises the United States, Japan, South Korea, and Taiwan. Collectively, the four members command an 84$28 billion in Japan, reshaping the national power grid's requirements in ways utilities are ill-equipped to meet. While Tokyo and Osaka remain the primary data centre hubs, severe power grid constraints in inner Tokyo (where connection waits can last five to ten years) are forcing a shift toward secondary markets. Grid projects take seven to ten years to complete, failing to meet the five-year deployment window demanded by investors. These delays have already pushed major data centre and foundry projects back to 2029 . There is a fundamental disconnect between hyperscaler needs and utility timelines that  I reckon no subsidy can easily resolve. Besides energy, another question remains: who will build the fabs? Japan's demographic challenge is well-documented; its specific consequences for the semiconductor industry are acute. Japan faces a domestic talent gap of approximately 40,000 semiconductor engineers, and only ~35% of Japanese students graduate with STEM degrees , which is somewhat behind international competitors. Policy recommendations include immigration reform to create dedicated visas for international semiconductor workers, but Japan's historically restrictive immigration framework makes this a slow and contested path. Moreover, capital expenditure amongst Japanese front-end manufacturers is well below that of international firms, a gap that ought to be reversed if Japan is to re-establish manufacturing competitiveness. Even within its revitalisation strategy, Japan faces a stark comparative disadvantage in advanced logic manufacturing. Japanese industry lags global leaders by an estimated 10 years . Another under-discussed vulnerability is Japan's back-end supply chain gap. Even if front-end fabrication (the making of wafers) succeeds in Japan, those wafers must currently be sent back to Taiwan for assembly and testing. This means Japan's supply chain resilience remains incomplete even in success scenarios, dependent on the very geography it is trying to diversify away from. In the power semiconductor segment (which is