Nanoscale Additive Manufacturing of Sub-24 nm Pitch Silicon Nanowire Arrays and High-Performance GAA FET Based on SiO 2 /SiN x Stacked Multilayers
Deploying gate-all-around (GAA) field effect transistors (FETs) in the back-end-of-line (BEOL) represents a promising pathway to extend Moore's law. Although the in-plane solid-liquid-solid (IPSLS) approach can produce planar silicon nanowires (SiNWs) with precise positions and alignment at low temperatures, the SiNW density should be further enhanced for higher integration density. Here, we employed SiO<sub>2</sub>/SiN<sub><i>x</i></sub> stacked multilayers to fabricate ultranarrow guiding step