Correcting processing-in-memory multiply-accumulate arithmetic errors with LDPC

Emerging processing-in-memory (PIM) architectures using memristors and analog computing face reliability issues from device non-idealities and noise. While error-correcting codes (ECCs) are vital, existing methods suffer from discontinuity and inefficiency. We propose a non-binary low-density parity-check (NB-LDPC) code over Galois field (GF) to address this. The design employs a 1024-symbol information word with 64 GF(3)-encoded check symbols, achieving 8-symbol error correction and compatibili